This chapter focuses on helping you choose the external memories for your embedded graphical user interface. Before reading this chapter, it is recommended to read the Preliminary Considerations and MCU so you are aware of some of the dependencies which are important when choosing the right external memories.
Running a TouchGFX GUI application sometimes requires external memories for storing the framebuffer(s), bitmaps, fonts, translations, etc. A TouchGFX GUI is not dependent on external memories to run, but needs either internal RAM (in MCU) or external RAM for storing the framebuffer(s), and internal and/or external flash for storing data.
The overview below shows some external memories which can be used with an STM32 MCU. Some of the different memory examples are available with both serial and parallel interfaces.
The different STM32 microcontrollers come with different external memory interfaces, allowing to connect different external memories.
In a GUI application, the non-volatile storage (flash) is mainly used for storing some or all graphical data assets, such as bitmaps, fonts, translations, and TouchGFX application code. The non-volatile memories are supported by the STM32 products and can be connected with different types of MCU interfaces using either parallel or serial memories and different configurations.
The choice of the non-volatile storage depends on:
- Type of the interface (parallel/serial)
- Bill of Material
The NOR flash is a non-volatile memory that allows random access to any area in the memory.
NOR flash ranges typically between 128 Mbits to 2 Gbits.
For example, for 480x320 resolution and 16 bits per pixel as color depth, the user interface needs ~300Kbytes for a full screen background image. This does not take into account the additional bitmaps needed for buttons, sliders, icons, fonts used, number of languages, etc. A 256 Mbits (32 MB) NOR flash can store up to ~100 unique full screen images, and less when adding the rest of the graphical assets needed.
The NOR flash can be used in memory mapped mode where the external flash is seen as an internal memory for read operations. This mode allows the system masters (such as DMA, LTDC, DMA2D, GFXMMU or SDMMC) to access the memory autonomously even in low-power mode when the CPU is stopped, which is ideal for mobile and wearable applications.
The NOR flash memory is available with different interface options:
- Parallel NOR flash (with x8 or x16 interfaces)
- Serial NOR flash (single, dual, quad and octo data lines for serial memories, and hyperbus flash)
Serial NOR flash memory is widely used as storage in graphical applications.
This type of memory has benefits such as:
- High frequency
- Simplifying and reducing the printed circuit board (PCB) area
- Memory mapped mode up to 256Mbytes of addressable area
- Number of needed pins is between 4 to 12 pins
The NOR flash memories are available with different data lines configurations.
Switching to the serial NOR flash memories with more data lines enhances the performance and the bandwidth of the memory interface, but also requires more pins to interface with the STM32 products.
Below is an overview of the different SPI memories depending on the number of data lines:
Parallel NOR flash memory has the same advantages as the serial flash memory in term of performance and configuration. The parallel NOR flash can be configured in memory mapped mode and can be accessed as if it was an internal memory. The differences between the parallel and serial NOR flash is the number of pins and the complexity of the printed circuit board (PCB).
Up to 47 pins are needed for the NOR flash memory with up to 24 pins for allocation and 16 pins for data.
NAND flash memory is ideal for graphical applications requiring a high volume of graphical assets and faster write and erase operations. The NAND flash memories cannnot be configured in a memory mapped mode and as a consequence, the NAND flash memories are not recommended for code execution.
NAND flash ranges between 1 Gbit to 512 Gbits.
Using a cache in RAM is often necessary when using NAND flash. This enables moving the currently used graphics assets to RAM and drawing them from the cache.
eMMC (Embedded Multi Media Card), established by the MMC Association, is equivalent to a NAND flash in addition to a master integrated controller. One obvious advantage of eMMC is the integration of a controller in the package that provides standard interfaces and management for the flash memory, allowing manufacturers to concentrate on other parts of product development and shorten the time to market.
The eMMC flash ranges between 2 Gbits to 128 Gbits.
The eMMC has relatively lower random read performance compared to NAND and NOR. eMMC can require adding a cache to overcome slow random read.
Up to 10 pins are needed for the eMMC flash memory with 8 pins for data and 2 pins for control.
External volatile memory is mainly used for storing the framebuffer(s), if the internal MCU RAM is insufficient, and in some cases to cache assets from non-memory mapped flash. This section focuses on SRAM, SDRAM and PSRAM as they are commonly used in embedded systems running a GUI. But there are other available variants, and the memory manufactures are using different naming schemes for their memories for example "hyper RAM", "IoT RAM", "octal RAM". Common for most of them is that it is possible to find an STM32 MCU which supports it.
When selecting the right external RAM, we recommend having the following in mind:
- Power consumption
- Interface / pin size
- Framebuffer strategy
SRAM is a static random-access memory which retains the bit data as long as the power is supplied. Generally SRAM provides faster access, but can be more expensive than DRAM and it comes in smaller densities. SRAM typically has a faster access time compared to DRAM and is therefore more suitable for GUIs needing more animations, scaling, rotation etc. SRAM comes in both synchronous and asynchronous modes, where the synchronous modes offers higher bandwidth capabilities, but also a more complex interface.
SDRAM is a dynamic random-access memory and stores each bit of data on capacitors, which requires less physical space to store the same amount of data compared to SRAM. As it requires constant refresh in order to keep the data, it requires more power compared to SRAM.
SDRAM densities typically come in 16 Mbits up to 512 Mbits, available in 8, 16, and 32 bit interfaces, running frequencies between 100-200 MHz.
A suitable SDRAM for storing two framebuffers running a 24bpp 800*480 resolution would be a 32 Mbits SDRAM as a double framebuffer strategy requires ~18Mbits of RAM.
PSRAM is pseudo static random access memory, with an internal structure of a DRAM (control logic) with an SRAM interface. It typically comes in 8-256 Mbits densities. PSRAM compared to traditional SDRAM and SRAM has the advantages of higher speed and lower power consumption.
New octal RAM and Hyper RAM memories use serial 8 bit interfaces in a single and dual data rate mode, offering high throughput speed and good integration.
If your strategy is to place the framebuffer(s) in external RAM, this table gives you an overview of different RAM densities available in the market.
It also provides you with an overview of needed RAM for running double framebuffer setup in 1, 2, 4, 8, 16, and 24 bits per pixel (dividing by 2 gives you the required density for a single framebuffer).
In some cases the single framebuffer setup is sufficient and in some STM32 microcontrollers, you have enough internal RAM for placing the framebuffer(s).